AS / A Level Computer Science
AS CS 4 - Processor Fundamentals
AS CS 4.1 Central Processing Unit (CPU) Architecture
Candidates should be able to:
Show understanding of the basic Von Neumann model for a computer system and the stored program concept
Notes and guidance
N/A
Candidates should be able to:
Show understanding of the purpose and role of registers, including the difference between general purpose and special purpose registers
Notes and guidance
Special purpose registers including:
Program Counter (PC)
Memory Data Register (MDR)
Memory Address Register (MAR)
The Accumulator (ACC)
Index Register (IX)
Current Instruction Register (CIR)
Status Register
Candidates should be able to:
Show understanding of the purpose and roles of the Arithmetic and Logic Unit (ALU), Control Unit (CU) and system clock, Immediate Access Store (IAS)
Notes and guidance
N/A
Candidates should be able to:
Show understanding of how data are transferred between various components of the computer system using the address bus, data bus and control bus
Notes and guidance
N/A
Candidates should be able to:
Show understanding of how factors contribute to the performance of the computer system
Notes and guidance
Including:
processor type and number of cores
the bus width
clock speed
cache memory
Candidates should be able to:
Understand how different ports provide connection to peripheral devices
Notes and guidance
Including connection to:
Universal Serial Bus (USB)
High Definition Multimedia Interface (HDMI)
Video Graphics Array (VGA)
Candidates should be able to:
Describe the stages of the Fetch-Execute (F-E) cycle
Notes and guidance
Describe and use 'register transfer' notation to describe the F-E cycle
Candidates should be able to:
Show understanding of the purpose of interrupts
Notes and guidance
Including:
possible causes of interrupts
applications of interrupts
use of an Interrupt Service handling Routine (ISR)
when interrupts are detected during the fetch-execute cycle
how interrupts are handled